(1) Field of the Invention
The present invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of preventing oxide peeling by calibrating the wafer transfer using an inspection control wafer after plasma etching in the fabrication of integrated circuit devices.
(2) Description of the Prior Art
During spin-on-glass etchback, the wafer is held at its edge by a clamp. The etching back of the spin-on-glass material produces a polymer which builds up under the edge of the clamp on the wafer surface. This polymer cannot be removed by the conventional plasma treatment. An oxide layer deposited over the wafer after spin-on-glass etchback will cover the polymer buildup. During the subsequent vacuum bake step, this high temperature treatment will cause the polymer buildup to inflate which will cause peeling away of the overlying oxide layer. Additionally, the peeled oxide will contaminate the production tools and the wafer.
U.S. Pat. No. 5,783,482 to S. L. Lee et al, issued on Jul. 21, 1998 discloses a method in which oxide peeling at the edge of a wafer is avoided by removing polymer contaminants from the edge of the wafer. This is achieved by adjusting the via edge exclusion zone of the photoresist mask so that the polymer is exposed and can be removed by the photoresist strip after etching. However, if the wafer transfer system causes the wafer to be shifted at the spin-on-glass etchback step or if the edge exclusion zone is shifted at the via photolithography step, the oxide layer above the persistent polymer cannot be removed by the photoresist strip step and oxide peeling will occur.